1. Field of the Invention
The present invention relates to a device and a method for measuring time lapse after turned off of power source of OA equipments and etc.
2. Description of the Prior Art
FIG. 5 is a circuit diagram of a conventional device for measuring the time lapse after turned off of the electric power source by using a capacitor. In the diagram, the numeral 1 denotes a capacitor (Capacitance C), in which there is an equivalent internal parallel resistor 2 (Resistance R3) of about 50 megohm resulting so called leakage current rather small.
The charging circuit of capacitor 1 consists of transistor 4, a load resistor 8 for transistor q, a rush current limiting resistor 6, and a direct-current constant-voltage supplier.
On the other hand, the discharging circuit for capacitor 1 consists of a resistor 13 (Resistance R1) for determining discharge time constant. Numeral 11 is an A/D converter for the conversion of the voltage of capacitor 1 into digital signal to be sent to CPU 12 as mentioned hereunder.
Numeral 12 is a CPU to calculate the time lapse after turned off of the electric power source based upon the output signal of A/D converter 11, and to switch transistor 4 ON to charge capacitor 1.
Then, the explanation is made on the control operation of CPU 12. Prior to turn off of the power source, transistor 4 is ON-conditioned and the capacitor 1 is under the charged state of saturation voltage EO.
At the time of turn off of the power source, transistor 4 is simultaneously switched OFF and the voltage of capacitor 1 is decreased with the lapse of time by discharging through resistor 2 according to the formula below. ##EQU1## When R3&gt;&gt;R1, EQU V=EO.times.EXP (-t/(C.times.R1) (1)
So, in this case, the discharge through leakage resistance R3 is negligible.
After some elapsing of time from the turn off of the power source, and when the power source is turned on again, CPU 12 reads out an output of A/D converter as the capacitor voltage V1 and calculates the time lapse from the time of the electric power source turned off by applying a voltage/time conversion table not shown. In the conversion table, there is the calculation result derived from following formula: EQU t=-C.times.R1.times.LN (V1/EO) (2)
: LN is a natural logarithm
After determining the time lapse from the time of turned off of the power source by calculation, then CPU 12 switches transistor 4 ON for charging of capacitor 1 to prepare for the next turn off of the power source.
FIG. 6 is a flow chart showing the above-mentioned control operation.
With turn off of the electric power source the value of A/D converter 11 is read (S 200) to obtain the time lapse after the power source turned off by applying conversion table LUT (LUT: Leak Up Table) not shown (S 201). Thereafter, transistor is switched ON (S 202) to prepare for the next turn off of the power source.
However, the electrostatic capacitance C of capacitor 1 generally has an variation range of approx. +-(plus minus) 20% to bring about a large measuring error of time lapse after turned off of the electric power source.
For instance, when there is an +20% error on C value, lapse time given from formula (2) is: EQU t=-C (1+0.2).times.R1.times.LN (V1/EO) (3)
Consequently, the difference from the genuine value will amount to +20%.
Therefore, the conventional device for measuring time lapse after the power source turned off by using capacitor gives a big error and is not appropriate for high accuracy measurement. In this connection, a time measuring device backed-up with battery is conventionally applied to measure the time lapse after the power source is turned off. This kind of time measuring device is normally high in cost and requires extra-cost for dismantling some parts like a battery which include noxious materials and must be recovered.